Various Approaches for Dynamic Load Balancing for Multiprocessor Interconnection Network - International Journal of Trend in Scientific Research and Development

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Wednesday, 24 February 2016

Various Approaches for Dynamic Load Balancing for Multiprocessor Interconnection Network

Multiprocessor interconnection network have become powerful parallel computing system for real-time applications. Now a days the many researchers doing research on the dynamic load scheduling in multiprocessor system. Load balancing is the method of dividing the total load among the processors of the distributed system to progress task's response time as well as resource utilization whereas ignoring a condition where few processors are overloaded or underloaded or moderately loaded. However, in dynamic load balancing algorithm presumes no priori information about behaviour of tasks or the global state of the system.

There are numerous issues while designing an efficient dynamic load balancing algorithm that involves utilization of system, amount of information transferred among processors, selection of tasks for migration, load evaluation, comparison of load levels and many more. This paper enlightens the performance analysis on dynamic load balancing strategy (DLBS) algorithm, used for hypercube network in multiprocessor system. Dynamic load scheduling (DLB)algorithm are required to efficiently solve this problems on multiprocessor systems.In this paper our focus on study and evaluation of various dynamic load balancing strategies such as SID, RID,DEM ,GM HBM etc

By Mukul Varshney | Dr. Anand Sharma | Abhakiran Rajpoot" Various Approaches for Dynamic Load Balancing for Multiprocessor Interconnection Network"

Published in International Journal of Trend in Scientific Research and Development (ijtsrd), ISSN: 2456-6470, Volume-1 | Issue-4 , June 2017,

Paper URL: http://www.ijtsrd.com/papers/ijtsrd2208.pdf 

Direct URL: http://www.ijtsrd.com/computer-science/computer-architecture/2208/various-approaches-for-dynamic-load-balancing-for-multiprocessor-interconnection-network/mukul-varshney

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